
	include "asmdef.h"

	SECTION Cpu ; declarations
		global FSR_lock
	ENDSEC

	SECTION Cpu ; declarations
		global FCpu_Interrupt
		global FCpu_GetSpeedMode
		global F_EntryPoint
	ENDSEC

	SECTION Cpu ; declarations
		xref Finit_56800_
	ENDSEC

	SECTION Cpu ; declarations
		global FPE_low_level_init
	ENDSEC

	SECTION Cpu ; declarations
		xref FSerialIO_Init
		xref FIdleTimer_Init
		xref FIdleTimer2a_Init
		xref FIdleTimer2b_Init
	ENDSEC

	SECTION Cpu ; declarations
		global FSR_reg
	ENDSEC

	SECTION Cpu

	ORG	X:


;			*** UNINITIALIZED DATA (.bss) ***

			align 2
		FSR_lock:	ds	1

	ENDSEC

	SECTION Cpu

	ORG	P:

;
;   56: ** =================================================================== 
;   57: */ 
;   58: #pragma interrupt alignsp 
;   59: void Cpu_Interrupt(void) 
;   60: { 
;
		subroutine "FCpu_Interrupt",FCpu_Interrupt,end_FCpu_Interrupt-FCpu_Interrupt
FCpu_Interrupt:
              alignsp     
;
;   61:   asm(DEBUGHLT);                       /* Halt the core and placing it in the debug processing state */ 
;
              debughlt    
;
;   62: } 
              suba        #<2,SP
              move.l      X:(SP)-,SP
              nop         
              nop         
              rti         
end_FCpu_Interrupt:

	ENDSEC

	SECTION Cpu

	ORG	P:

;
;   63:  
;   64: /* 
;   65: ** =================================================================== 
;   66: **     Method      :  Cpu_DisableInt (bean 56F8013VFAE) 
;   67: ** 
;   68: **     Description : 
;   69: **         Disables all maskable interrupts 
;   70: **     Parameters  : None 
;   71: **     Returns     : Nothing 
;   72: ** =================================================================== 
;   73: */ 
;   74: /* 
;   75: void Cpu_DisableInt(void) 
;   76:  
;   77: **      This method is implemented as macro in the header module. ** 
;   78: */ 
;   79:  
;   80: /* 
;   81: ** =================================================================== 
;   82: **     Method      :  Cpu_EnableInt (bean 56F8013VFAE) 
;   83: ** 
;   84: **     Description : 
;   85: **         Enables all maskable interrupts 
;   86: **     Parameters  : None 
;   87: **     Returns     : Nothing 
;   88: ** =================================================================== 
;   89: */ 
;   90: /* 
;   91: void Cpu_EnableInt(void) 
;   92:  
;   93: **      This method is implemented as macro in the header module. ** 
;   94: */ 
;   95:  
;   96: /* 
;   97: ** =================================================================== 
;   98: **     Method      :  Cpu_SetStopMode (bean 56F8013VFAE) 
;   99: ** 
;  100: **     Description : 
;  101: **         Sets low power mode - Stop mode. 
;  102: **         For more information about the stop mode see this CPU 
;  103: **         documentation. 
;  104: **     Parameters  : None 
;  105: **     Returns     : Nothing 
;  106: ** =================================================================== 
;  107: */ 
;  108: /* 
;  109: void Cpu_SetStopMode(void) 
;  110:  
;  111: **      This method is implemented as macro in the header module. ** 
;  112: */ 
;  113:  
;  114: /* 
;  115: ** =================================================================== 
;  116: **     Method      :  Cpu_SetWaitMode (bean 56F8013VFAE) 
;  117: ** 
;  118: **     Description : 
;  119: **         Sets low power mode - Wait mode. 
;  120: **         For more information about the wait mode see this CPU 
;  121: **         documentation. 
;  122: **         Release from wait mode: Reset or interrupt 
;  123: **     Parameters  : None 
;  124: **     Returns     : Nothing 
;  125: ** =================================================================== 
;  126: */ 
;  127: /* 
;  128: void Cpu_SetWaitMode(void) 
;  129:  
;  130: **      This method is implemented as macro in the header module. ** 
;  131: */ 
;  132:  
;  133: /* 
;  134: ** =================================================================== 
;  135: **     Method      :  Cpu_GetSpeedMode (bean 56F8013VFAE) 
;  136: ** 
;  137: **     Description : 
;  138: **         Gets current speed mode 
;  139: **     Parameters  : None 
;  140: **     Returns     : 
;  141: **         ---             - Speed mode (HIGH_SPEED, LOW_SPEED, 
;  142: **                           SLOW_SPEED) 
;  143: ** =================================================================== 
;  144: */ 
;  145: byte Cpu_GetSpeedMode(void) 
;  146: { 
;  147:   return HIGH_SPEED;                   /* Result the actual cpu mode - high speed mode*/ 
;
		subroutine "FCpu_GetSpeedMode",FCpu_GetSpeedMode,end_FCpu_GetSpeedMode-FCpu_GetSpeedMode
FCpu_GetSpeedMode:
              move.w      #<0,Y0
;
;  148: } 
              rts         
end_FCpu_GetSpeedMode:

	ENDSEC

	SECTION Cpu

	ORG	P:

;
;  149:  
;  150: /* 
;  151: ** =================================================================== 
;  152: **     Method      :  _EntryPoint (bean 56F8013VFAE) 
;  153: ** 
;  154: **     Description : 
;  155: **         This method is internal. It is used by Processor Expert 
;  156: **         only. 
;  157: ** =================================================================== 
;  158: */ 
;  159: extern void init_56800_(void);         /* Forward declaration of external startup function declared in startup file */ 
;  160:  
;  161: /*** !!! Here you can place your own code using property "User data declarations" on the build options tab. !!! ***/ 
;  162:  
;  163: void _EntryPoint(void) 
;  164: { 
;  165:  
;  166:   /*** !!! Here you can place your own code before PE initialization using property "User code before PE initialization" on the build options tab. !!! ***/ 
;  167:  
;  168:   /*** ### 56F8013VFAE "Cpu" init code ... ***/ 
;  169:   /*** PE initialization code after reset ***/ 
;  170:   /* System clock initialization */ 
;  171:   setRegBitGroup(OSCTL, TRIM, (word)getReg(FMOPT1)); /* Set the trim osc freq with factory programmed value */ 
;
		subroutine "F_EntryPoint",F_EntryPoint,end_F_EntryPoint-F_EntryPoint
F_EntryPoint:
              move.l      #$f0f5,R1
              move.w      X:(R1),A
              move.w      #-1024,B
              and.w       A,B
              move.w      X:>>$f41b,A
              or.w        B,A
              move.w      A1,X:(R1)
;
;  172:   clrRegBit(PLLCR, PRECS);             /* Select an internal clock source for the CPU core */ 
;
              move.l      #$f0f0,R0
              bfclr       #4,X:(R0)
;
;  173:   setReg(PLLCR, (PLLCR_LCKON_MASK | PLLCR_ZSRC0_MASK)); /* Enable PLL, LCKON and select clock source from prescaler */ 
;  174:   /* PLLDB: LORTP=2,??=0,PLLCOD=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */ 
;
              move.w      #129,X:(R0)
;
;  175:   setReg16(PLLDB, 0x2000);             /* Set the clock prescalers */  
;
              move.w      #8192,X:>>$f0f1
;
;  176:   while(!getRegBit(PLLSR, LCK0)){}     /* Wait for PLL lock */ 
;
_L17_0:
              move.w      X:>>$f0f2,A
              brclr       #$20,A1,<_L17_0	; *-3
;
;  177:   setReg(PLLCR, (PLLCR_LCKON_MASK | PLLCR_ZSRC1_MASK)); /* Select clock source from postscaler */ 
;  178:   /* FMCLKD: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DIVLD=0,PRDIV8=0,DIV=0x28 */ 
;
              nop         
              nop         
              move.w      #130,X:>>$f0f0
;
;  179:   setReg16(FMCLKD, 0x28);              /* Set the flash clock prescaler */  
;  180:   /*** End of PE initialization code after reset ***/ 
;  181:  
;  182:   /*** !!! Here you can place your own code after PE initialization using property "User code after PE initialization" on the build options tab. !!! ***/ 
;  183:  
;
              move.w      #>40,X:>>$f400
;
;  184:   asm(JMP init_56800_);                /* Jump to C startup code */ 
;
              jmp         >Finit_56800_
;
;  185: } 
              rts         
end_F_EntryPoint:

	ENDSEC

	SECTION Cpu

	ORG	P:

;
;  186:  
;  187: /* 
;  188: ** =================================================================== 
;  189: **     Method      :  PE_low_level_init (bean 56F8013VFAE) 
;  190: ** 
;  191: **     Description : 
;  192: **         This method is internal. It is used by Processor Expert 
;  193: **         only. 
;  194: ** =================================================================== 
;  195: */ 
;  196: void PE_low_level_init(void) 
;  197: { 
;  198:   /* GPIO_A_DRIVE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DRIVE=0 */ 
;  199:   setReg16(GPIO_A_DRIVE, 0x00);        /* Set High/Low drive strength on GPIOA pins according to the CPU bean settings */  
;  200:   /* GPIO_B_DRIVE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DRIVE=0 */ 
;
		subroutine "FPE_low_level_init",FPE_low_level_init,end_FPE_low_level_init-FPE_low_level_init
FPE_low_level_init:
              move.w      #>0,X:>>$f10b
;
;  201:   setReg16(GPIO_B_DRIVE, 0x00);        /* Set High/Low drive strength on GPIOB pins according to the CPU bean settings */  
;  202:   /* GPIO_C_DRIVE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DRIVE6=0,DRIVE5=0,DRIVE4=0,??=0,DRIVE2=0,DRIVE1=0,DRIVE0=0 */ 
;
              move.w      #>0,X:>>$f11b
;
;  203:   setReg16(GPIO_C_DRIVE, 0x00);        /* Set High/Low drive strength on GPIOC pins according to the CPU bean settings */  
;  204:   /* GPIO_D_DRIVE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DRIVE=0 */ 
;
              move.w      #>0,X:>>$f12b
;
;  205:   setReg16(GPIO_D_DRIVE, 0x00);        /* Set High/Low drive strength on GPIOD pins according to the CPU bean settings */  
;  206:   /* SIM_GPS: TCR=0,PCR=0 */ 
;
              move.w      #>0,X:>>$f13b
;
;  207:   clrReg16Bits(SIM_GPS, 0xC000);       /* Set the TMR and PWM module clock rates */  
;  208:   /* SIM_PCE: I2C=0,??=0,ADC=0,??=0,??=0,??=0,??=0,??=0,??=0,TMR=1,??=0,SCI=1,??=0,SPI=0,??=0,PWM=0 */ 
;
              move.l      #$f14b,R1
              bfclr       #$c000,X:(R1)
;
;  209:   setReg16(SIM_PCE, 0x50);             /* Set up the peripheral clock enable register */  
;  210:   /* SIM_CONTROL: TC3_SD=0,TC2_SD=0,TC1_SD=0,TC0_SD=0,SCI_SD=0,??=0,TC3_INP=0,??=0,??=0,??=0,OnceEbl=1,SWRst=0,stop_disable=0,wait_disable=0 */ 
;
              move.w      #80,X:>>$f14c
;
;  211:   setReg16(SIM_CONTROL, 0x20);         /* Set up the SIM control register */  
;  212:   /* Common initialization of the CPU registers */ 
;  213:   /* SIM_GPS: CFG_B7=0,CFG_B6=0 */ 
;
              move.w      #>32,X:>>$f140
;
;  214:   clrReg16Bits(SIM_GPS, 0x0C00);         
;  215:   /* GPIO_B_PER: PE|=0xC0 */ 
;
              bfclr       #$c00,X:(R1)
;
;  216:   setReg16Bits(GPIO_B_PER, 0xC0);        
;  217:   /* INTC_IPR2: SCI_RCV_IPL=2,SCI_RERR_IPL=2,SCI_TIDL_IPL=2,SCI_XMIT_IPL=2 */ 
;
              bfset       #$c0,X:>>$f113
;
;  218:   clrSetReg16Bits(INTC_IPR2, 0x5140, 0xA280);  
;  219:   /* ### Init_SCI "SerialIO" init code ... */ 
;
              move.l      #$f062,R0
              move.w      X:(R0),B
              move.w      #-20801,A
              and.w       B,A
              bfset       #$a280,A1
              move.w      A1,X:(R0)
;
;  220:   SerialIO_Init(); 
;  221:  
;  222:   /* ### Init_TMR "IdleTimer" init code ... */ 
;
              jsr         >FSerialIO_Init
;
;  223:   IdleTimer_Init(); 
;  224:   /* ### Init_TMR "IdleTimer2a" init code ... */ 
;
              jsr         >FIdleTimer_Init
;
;  225:   IdleTimer2a_Init(); 
;  226:   /* ### Init_TMR "IdleTimer2b" init code ... */ 
;
              jsr         >FIdleTimer2a_Init
;
;  227:   IdleTimer2b_Init(); 
;
              jsr         >FIdleTimer2b_Init
;
;  228:   __EI(0);                             /* Enable interrupts of the selected priority level */ 
;
              bfclr       #$300,SR
;
;  229: } 
;
              rts         
end_FPE_low_level_init:

	ENDSEC

	SECTION Cpu

	ORG	X:


;			*** UNINITIALIZED DATA (.bss) ***

			align 2
		FSR_reg:	ds	1

	ENDSEC


	END
